Layout in advanced CMOS technologies including floorplan, placement, routing, DRC, LVS etc.
Should have worked on 16nm and below technology nodes on various analog mixed signal blocks such as PLL, Bandgap, ADC, DAC, SERDES, IO.
Salary:INR 9,00,000 – 19,00,000 P.A
Industry: IT-Software / Software Services
Functional Area: IT Software – Embedded , EDA , VLSI , ASIC , Chip Design
Role Category:Programming & Design
Role:Team Lead/Technical Lead
Layout Design Floorplan
Desired Candidate Profile
UG: B.Tech/B.E. – Any Specialization
PG:M.Tech – Any Specialization
Doctorate:Any Doctorate – Any Specialization, Doctorate Not Required
Please refer to the Job description above
Qusol is hiring for its largest service based semi conductor client for Hyderabad Location.
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