Physical Design-SMTS ( Sr. Individual contributor role with team handling experience) for Bangalore/Hyderabad Locations
Hands-on experience with RTL2GDSII;
Strong understanding of Physical design fundamentals and implementation of SoC/Block Design using Digital gates and Hard macros;
Hands-on experience with Floorplanning, P&R, static timing analysis in digital implementation;
Tapeout experience in sub 20nm technologies with good knowledge of Physical Verification, Scripts, Tcl a must;
Interaction with Global Teams a must;
Should be able to lead small team of people for certain tasks.
– Salary is not a constraint for good candidate
Testchip implementation in latest technology nodes (16nm, 14nm and below technologies), participate in post silicon validation support
Qualification : Masters or B.E/B.Tech in Electrical/Electronics Engineering
Experience: 10+ yrs.
If you are interested please send me firstname.lastname@example.org
along with your updated CV.
Salary:INR 15,00,000 – 30,00,000 P.A
Industry: Semiconductors / Electronics
Functional Area: IT Software – Embedded , EDA , VLSI , ASIC , Chip Design
Role Category:Programming & Design
Electricals Timing Analysis
Desired Candidate Profile
UG: Any Graduate – Any Specialization, Graduation Not Required
PG:Any Postgraduate – Any Specialization, Post Graduation Not Required
Doctorate:Any Doctorate – Any Specialization, Doctorate Not Required
Please refer to the Job description above
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